Design and Simulation for a High-efficiency Class-B Power Amplifier
MATEC Web of Conferences
Design and S imulation for a High-efficiency Class-B P ow er Amplifier
Wei Jiang 1
Qian Lin 1
Haifeng Wu 0
0 Chengdu Ganide Technology Co Ltd , Chengdu, 610000 , China
1 College of Physics and Electronic Information Engineer, Qinghai University for Nationalities , Xining, 810007 , China
A class-B power amplifier with high output power and high power added efficiency (PAE) is designed in this paper. Based on the ADS tools of load-pull and source-pull, the optimal load impedance and source impedance can be obtained, respectively. Then, the matching circuit have been achieved by combining the impedance matching technique. Simulation results show that the class-B power amplifier has the PAE of 69.386% and output power of 45.32dBm with the working frequency of 960MHz. Therefore, It is a high-efficiency class-B power amplifier.
1 Introduction
Nowadays, all the major wireless standards-GSM,
DMA,WCDMA, 802.11 a/b/g/n, WiBro and WiMax- are
being integrated into a single package and widely
adopted in the wireless communication system. A radio
that integrates all of this functionality onto a single chip
is urgently needed. One of the major impediments to
addressing all these needs is the RF front end,
specifically, the power amplif ier (PA). That is to say, the
compact and fully integrated radio frequency (RF) and
microwave front-end products are the indeed demand for
the rapid development of the wireless communication
system. As a result, achieving simultaneously high
efficiency and high linearity remains one of the major
challenges in microwave PAs.
To our knowledge, PA is the core component of the
wireless transmitter, its main function is to increase the
RF power enough, which is effectively transmitted to a
receiver through air medium. As the key equipment for
the modern wireless communication, PAs have been
widely applied in satellite communication, radar,
wireless communications, navigation, electronic counter
measures etc [1].
As mentioned above, in order to obtain the largest
output power within a certain frequency range, the
power transistor often works near the saturated state. At
this point, its S parameters often change with the
variation of the input signal, and the power gain will
become smaller. In other words, the output/input of
conjugate match gradually will become mismatching due
to the small signal input. Then, it can not be able to
obtain the maximum output power [
2
]. Therefore, the
key point for PA design mainly lies in the design of
matching network.
The technology of load-pull is the major method to
find out the optimum load impedance corresponding to
*
the largest output power. Meanwhile, the optimal source
impedance can be obtained by the technology of
sourcepull. Finally, the output and the input matching circuit
can be achieved, respectively.
Furthermore, comparing with the other PAs,
Class-B PA has better linearity and higher
power efficiency, for which its PAE can reach about
78.5% theoretically [3]. The DC working point for the
power transistor of the class-B PA is often biased at the
breakpoint [4], then the DC output current is zero. When
the AC signal is used as the input, the power transistor
switches on in a half cycle and switches off in the
negative half cycle of AC signal. This operation mode of
half cycle for class-B PA has remarkable advantages
over Class-A PA. Moreover, the microwave field effect
transistor (FET) of class-B PA can cause the increase of
power efficiency and substantial reduction of both DC
power and heat dissipation. Therefore, how to keep high
efficiency and high power is the major challenge for the
class-B PA.
The design strategies and implementation of a
high efficiency class–B power amplifier based on the
Freescale FET of MRFE6S9046 are presented in this
paper. The simulation results show that the power
additional efficiency (PAE) is 69.39% with output power
of 45.32dBm when the input power is 26.5dBm in the
working frequency of 960 MHZ. Thus, the demands of
high performance and high efficiency can be achieved by
comparing with the class-B PAs reported in exiting
literatures.
This paper is organized as follows. The design of a
high efficiency class-B PA is introduced in detail in
Section II. Then its matching circuits of the source input
impedances and the output impedances have been
presented in Section III. In Section IV, the measured
results of this PA are discussed as well as the
conclusions.
2 Design of the class-B power amplifier
The circuit schematic of the class-B PA based on
the FET of Freescale MRFE6S9046 is given in Fig.1. It
can be observed that it is consisted with the signal source,
input matching circuit, power transistor, DC bias circuit,
the output matching circuit and the load. Furthermore,
based on the datasheet of this transistor, it can be known
that when the PA works in the typical GSM mode. In
this way, the DC bias circuit is used to set the
appropriate working point for the power transistor. (...truncated)