Effect of write voltage and frequency on the reliability aspects of memristor-based RRAM

International Nano Letters, Aug 2017

In this paper, we report the effect of the write voltage and frequency on memristor-based resistive random access memory (RRAM). The above-said parameters have been investigated on the linear drift model of the memristor. With a variation of write voltage from 0.2 to 1.2 V and a subsequent frequency modulation from 1, 2, 4, 10, 100 and 200 Hz, the corresponding effects on memory window, low resistance state (LRS) and high resistance state (HRS) have been reported. Thus, the lifetime (τ) reliability analysis of memristor-based RRAM is carried out using the above results. It is found that the HRS is independent of the write voltage, whereas LRS shows dependency on write voltage and frequency. The simulation results showcase the fact that the memristor possesses higher memory window and lifetime (τ) in the higher voltage with lower frequency region, which has been attributed to less data losses in the memory architecture.

A PDF file should load here. If you do not see its contents the file may be temporarily unavailable at the journal website or you do not have a PDF plug-in installed and enabled in your browser.

Alternatively, you can download the file locally and open with any standalone PDF reader:

https://link.springer.com/content/pdf/10.1007%2Fs40089-017-0217-z.pdf

Effect of write voltage and frequency on the reliability aspects of memristor-based RRAM

Int Nano Lett Effect of write voltage and frequency on the reliability aspects of memristor-based RRAM T. D. Dongale 0 1 2 3 4 5 6 7 8 9 10 11 12 K. V. Khot 0 1 2 3 4 5 6 7 8 9 10 11 12 S. V. Mohite 0 1 2 3 4 5 6 7 8 9 10 11 12 N. D. Desai 0 1 2 3 4 5 6 7 8 9 10 11 12 S. S. Shinde 0 1 2 3 4 5 6 7 8 9 10 11 12 V. L. Patil 0 1 2 3 4 5 6 7 8 9 10 11 12 S. A. Vanalkar 0 1 2 3 4 5 6 7 8 9 10 11 12 A. V. Moholkar 0 1 2 3 4 5 6 7 8 9 10 11 12 K. Y. Rajpure 0 1 2 3 4 5 6 7 8 9 10 11 12 P. N. Bhosale 0 1 2 3 4 5 6 7 8 9 10 11 12 P. S. Patil 0 1 2 3 4 5 6 7 8 9 10 11 12 P. K. Gaikwad 0 1 2 3 4 5 6 7 8 9 10 11 12 R. K. Kamat 0 1 2 3 4 5 6 7 8 9 10 11 12 0 S. V. Mohite 1 P. K. Gaikwad 2 Department of Chemistry, Shivaji University , Kolhapur 416004 , India 3 & T. D. Dongale 4 P. N. Bhosale 5 K. Y. Rajpure 6 A. V. Moholkar 7 Embedded System and VLSI Research Laboratory, Department of Electronics, Shivaji University , Kolhapur 416004 , India 8 S. A. Vanalkar 9 Department of Physics, Shivaji University , Kolhapur 416004 , India 10 Thin Film Materials Laboratory, Department of Physics, Shivaji University , Kolhapur 416004 , India 11 S. S. Shinde 12 School of Nanoscience and Biotechnology, Shivaji University , Kolhapur 416004 , India In this paper, we report the effect of the write voltage and frequency on memristor-based resistive random access memory (RRAM). The above-said parameters have been investigated on the linear drift model of the memristor. With a variation of write voltage from 0.2 to 1.2 V and a subsequent frequency modulation from 1, 2, 4, 10, 100 and 200 Hz, the corresponding effects on memory window, low resistance state (LRS) and high resistance state (HRS) have been reported. Thus, the lifetime (s) reliability analysis of memristor-based RRAM is carried out using the above results. It is found that the HRS is independent of the write voltage, whereas LRS shows dependency on write voltage and frequency. The simulation results showcase the fact that the memristor possesses higher memory window and lifetime (s) in the higher voltage with lower frequency region, which has been attributed to less data losses in the memory architecture. Memristor; RRAM; Lifetime reliability; Write voltage; Memory window - Computational Electronics and Nanoscience Research Laboratory, School of Nanoscience and Biotechnology, Shivaji University, Kolhapur 416004, India Introduction Traditionally, the passive circuit family in electrical engineering consists of three lumped elements, viz., resistor, inductor, and capacitor. In 2008, HP research group reported the first physical realization of a fourth fundamental circuit element named as Memristor [ 1 ], which was postulated mathematically four decades earlier by Chua [ 2 ]. Memristor is a nonlinear circuit element and possesses nonvolatile memory property, which is not observed in any other circuit elements. The inherent memory property of memristor is distinctly observed in the nanoscale and therefore, it is considered as a strong candidate for the next generation memories [ 3 ]. Along with its applications in memory, there are many interesting applications explored around memristors such as neuromorphic computations [ 4 ], in-memory computing [ 5 ], biomedical application [ 6 ] and much more. Recently, Nickel et al. [ 7 ] developed the nonlinear, bipolar memristor crossbar structures and demonstrated the high scalability in the developed device. Emara et al. [ 8 ] reported the 1T2 M differential memory cell for single and multi-bit data storage. Ning et al. [ 9 ] proposed the nonvolatile threshold adaptive transistors model with embedded RRAM for neuromorphic application. Dongale et al. [ 10 ] reported the TiO2 thin film memristor with the low symmetric voltage switching. Hoessbacher et al. [ 11 ] reported a novel application of memristor in the plasmonic domain. The reported plasmonic memristor can be used as electrically activated optical switches with a memory effect. Murali et al. reported the zinc–tin–oxide (ZTO) based memristor. Good switching ratio, long retention time, and good endurance have been observed in the developed memory device [ 12 ]. Against the backdrop of the international research scenario, our research group is also striving hard to model and realize memristor using different methods and come out with useful applications [ 13–16 ]. Previously we have reported the effect of device size as a function of frequency on memristor-based RRAM [17]. We have also investigated the conduction mechanism and frequency dependency of nanostructured memristor device [ 18, 19 ]. In the present paper, we have reported the effect of write voltage as a function of frequency on memristor-based resistive random access memory (RRAM) and thereby ensured the reliability of the device. The proposed investigation is based on linear drift model of memristor proposed by HP research group [ 1 ]. The rest of the paper is as follows: After a brief introduction in the first section, the second section deals with the computational details, followed by the effect of write voltage as a function of frequency on memristor-based RRAM in the third section. The fourth section investigates the effect of write voltage as a function of frequency variation on lifetime (s) reliability of memristor device. At the end, the conclusion is portrayed. Computational details The memristor properties are simulated using linear drift model [ 1 ]. For the present investigation, the drift velocity of oxygen vacancies is considered as a state variable ‘w’. The details of conduction mechanism and device structure have been investigated thoroughly by many researchers [ 14, 15, 20–22 ]. Considering the linear ionic drift with the average drift velocity of oxygen vacancies lV leads us to memristor current and voltage relation represented by the following mathematical equations [ 1 ]: V ðtÞ ¼ RONWðtÞ D þ ROFF 1 WðtÞ D iðtÞ; where state variable ‘w’ can be represented as, dwðtÞ ¼ g lvRON iðtÞ; dt D where V(t) represents applied voltage, i(t) is the current through the device, D is the device size, RON and ROFF are considered as LRS and HRS of the device, respectively, and g represents the polarity of the device. The present simulation is carried out for a 10 nm memristor device in which the doped region is about 2 nm and drift velocity of oxygen vacancies is lV = 10-14 m2 V-1 s-1. The amplitude is progressively increased in steps of 0.2 V and a corresponding effect has been observed on LRS and HRS. Similarly, effects of frequency on memory window and lifetime (s) reliability are also investigated. ð1Þ ð2Þ Effect of write voltage and frequency on memristor-based RRAM The write voltage plays a key role in the resistive switching of memristor device. The properties of memristor are distinctly observed in the nanoscale regions and at this region, small bias can produce large electric field across the device which accelerates the drift velocity of charge carriers. In other words, this kind of effect can be understood by nanoscopic drift–diffusion model and not by macroscopic drift–diffusion model. In this scenario, an application of a small bias (few volts) on the nanoscale device results in the generation of the extremely strong electric field in the active region of a device (*1 MV cm-1) [ 22 ]. This strong electric field reduces the activation barrier which results in an increase in the drift velocity of charge carriers or nanoscopic nonlinear ionic transport [ 22 ]. Furthermore, this strong electric field produces nonlinear drifting of vacancies near the boundary interfaces [ 20–22 ]. In view of this, the Fig. 1a–f represents the effect of write voltage on the pinched hysteresis loop (PHL) of memristor device. The bipolar resistive switching is observed for each case. The area under bipolar resistive switching (pinched hysteresis loop) seems to be increasing with the corresponding increase in write voltage, i.e., from 0.2 to 1.0 V; subsequently, the loop area tends to decrease. Generally, the PHL is considered as a memory property of memristor. The results clearly show that memristor requires appropriate bias for bipolar resistive switching. In the present investigation, the highest bipolar resistive switching is observed in the order of 0.8–1.0 V. This typical loop area of the memristor is termed as memristance and the value thereof is one of the performance metrics of resistive random access memory (RRAM). The increase in the memristance is due to the fact that the concentration and motilities of vacancies are increased in the range of particular bias [ 21–23 ]. The loop area is degraded above 1 V and shows highly nonlinear behavior at 1.2 V. The nonlinear behavior at this range is attributed to the large electric field across the 10 nm device. This large electric field produces nonlinear drifting of vacancies near the boundary interfaces, which further results in high nonlinearity in the I–V characteristics. The increase in the loop area with an increase in the bias is in good agreement with the experimental result reported in the literature for different active layer materials and device structures [ 24, 25 ]. The results indicate that 1 V is an upper threshold for memristor when it is used for RRAM applications at 10 nm device dimension. The change in the bias also alters the response of the charge-magnetic flux plot. The chargemagnetic flux plot is linear at the lower value of write voltage (0.2–0.4 V) and it becomes nonlinear at a higher value of write voltage (0.6–1.2 V), which is shown in the Fig. 2a–f. The symmetric nature of I–V also gets altered when the bias of the device is changed, which is shown in the Fig. 3a–f. These results indicate that the memristor possesses bias-dependent resistive switching property. The results of the present simulations suggest that the current multiplier factor plays an important role in resistive switching and is found to be 10-5 A for 0.2–0.6 V. The same becomes 10-4, 10-3 A for the 0.8–1.0, and 1.2 V, respectively. At the nanoscale, current threshold for resistive switching seems to be operational and the rate of drifting of oxygen vacancies (state variable of memristor) is higher at a particular range of bias and lower for other bias. The simulation results are clearly evident that memristor is a very apt fundamental building block of the nonvolatile memory with a high degree of symmetry. The lower resistive switching voltage makes it a promising candidate for future low power consumption memories. The effect of write voltage on LRS and HRS is also shown in Figs. 4 and 5. It is found that the LRS increases as the applied write voltage increases and there is no effect observed on HRS. The increase in the LRS value may be due to the oxidation at electrodes during the resistive switching process and it is in good agreement with the experimental result reported in the literature [ 26 ]. The memory window is high only at lower frequencies (1 and 2 Hz) and tends to diminish at higher frequencies. The very small change in the LRS is observed at higher frequencies. In actual practice, memory window should be high to detect the two resistance states easily by read/write circuits. The memory window is one of the performance metrics of high-performance RRAM and it is associated with correction of data reading. The small memory window leads to read/write errors in the memory architecture [ 17, 27 ]. The results associated with the LRS are in good agreement with the result reported by Nili et al. [28]. However, the HRS results are not matching with the results in Ref. [ 28 ]. This is due to fact that the different physical mechanisms such as ionic [ 29 ], electrochemical [ 30 ], Joule heating [ 31 ], raising and lowering Schottky barriers [ 32 ] etc are getting associated with the memristor device. The detailed discussion of various conduction mechanisms can be found in [ 20, 33, 34 ]. Thus, the results clearly depict the existence of higher memory window only at higher write voltage with lower frequency. This results in fewer read/write errors in the memristor-based RRAM. The results also suggested that the memory window becomes very small at higher frequency; therefore, read/write errors become dominant and, 0.6 0.8 Applied Bias (V) 1.0 1.2 Effect of bias or write voltage and frequency on memristor lifetime (s) reliability The data-handling capacity of a memory device, in general, is characterized by its data retention property. The data are supposed to be retained for a very long period of time and it is one of the primary requirements for any memory device. The external or internal malfunction or faults can be responsible for data losses [ 17, 27 ]. Furthermore, this fault also affects the lifetime (s) reliability of the memory device. The lifetime of the memristor, as well as data retention, can be increased by taking proper care of faults and malfunctions. Against this backdrop, we have investigated the effect of write voltage and frequency on the reliability of memristor-based RRAM. The results LRS HRS LRS HRS LRS HRS 100000 10000 ) m h O ( e c an 1000 it s r m e M 100 100000 10000 ) m h O ( e cn 1000 a it s r m e M 100 100000 10000 ) m h O ( e cn 1000 a it s r m e M 100 b 0.2 d f 0.4 0.6 0.8 Applied Bias (V) 1.0 1.2 0.4 0.6 0.8 Applied Bias (V) 1.0 1.2 0.4 0.6 0.8 Applied Bias (V) 1.0 1.2 0.2 0.4 1.0 1.2 0.6 0.8 Applied Bias (V) 100000 10000 ) m h O ( e cn1000 a it s r m e M100 100000 10000 ) m h O ( e cn 1000 a it s r m e M 100 100000 10000 ) m h O ( e cn 1000 a it s r m e M 100 0.2 0.4 1.0 1.2 0.2 0.4 1.0 1.2 0.6 0.8 Applied Bias (V) 0.6 0.8 Applied Bias (V) 200 Hz respectively. The results clearly indicate that the LRS is decreased for low frequencies up to 10 Hz and HRS remains same for all voltages and frequencies. The memory window is found to higher at low frequencies described in the previous sections confirm the important role of write voltage in the memristor-based RRAM. With reference to the write voltage scenario, the value of LRS is very low for lower voltage region, and it becomes high for higher voltage region. At the same time, the value of LRS increases as the frequency of applied signal increases which is shown in Fig. 5. The low value of LRS is responsible for higher peak current. If peak current gets decreased by any malfunction or process variation, then the lifetime of memristor-based RRAM too worsens. If the peak current is reduced to its minimum threshold value, then the sense amplifier cannot distinguish the difference between data and noise. The random-telegraph noise is often considered as the reason to a 0.1 lower the reliability of memristor devices [ 35, 36 ]. The lower magnitude of current and noise are responsible for the data loss in the memory architecture [ 17, 27 ]. In general, the data correspond to the resistance states (LRS and HRS) of the memristor. The results of our investigation clearly show that the memristor possesses higher lifetime (s) in the higher voltage region with a lower frequency of applied signal, which is depicted in Fig. 6. It is also seen that the lifetime (s) is degraded at higher frequencies. The lower voltage region of RRAM shows the lower value of peak current; hence, sense amplifier does not distinguish between data and noise. Therefore, any process variation, which leads to lower peak current values, is responsible for the lower lifetime (s) of memristor-based RRAM. The results also confirm that the higher bias with lower frequency region could be the best possible domain to get a higher lifetime (s) of memristor-based RRAM. Conclusion The present paper portrayed the effect of the write voltage and frequency on memristor-based resistive random access memory (RRAM). It is found that the LRS is a function of write voltage and frequency but HRS is independent of write voltage and frequency. It is further revealed that memory window tends to increase with an increase in the write voltage. Furthermore, the memory window is found to be the function of frequency and higher memory window is achieved at the lower frequency region. In the present investigation, memory window is found to be *200 for frequency value B2 Hz and it decreases after 4 Hz. The lifetime (s) reliability analysis of memristor-based RRAM is carried out using LRS results. It is observed that 1.0 Voltage (V) memristor possesses higher lifetime (s) at higher voltage with lower frequency region, i.e., the magnitude of the current is found to be *0.01 A for frequency value B2 Hz and it decreases for higher frequencies. The simulation results confirm that the higher frequency region is responsible for the lower memory window and higher errors in the memory architecture. Open Access This article is distributed under the terms of the Creative Commons Attribution 4.0 International License (http://crea tivecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. Author contributions TDD, KVK, SVM, NDD, and SSS investigated the mathematical model. TDD, VLP, SAV, AVM and KYR developed the MATLAB code. PNB, PSP, PKG and RKK analyzed the results. TDD, KVK, AVM, KYR, and RKK documented the manuscript. All authors reviewed the manuscript. 1. Strukov , D.B. , Snider , G.S. , Stewart , D.R. , Williams , R.S.: The missing memristor found . Nature 453 ( 7191 ), 80 - 83 ( 2008 ) 2. Chua , L.O. : Memristor-the missing circuit element . IEEE Trans. Circuit Theory 18 ( 5 ), 507 - 519 ( 1971 ) 3. Tour , J.M. , He , T. : Electronics: the fourth element . Nature 453 ( 7191 ), 42 - 43 ( 2008 ) 4. Dongale , T.D., Patil , P.J. , Desai , N.K. , Chougule , P.P. , Kumbhar , S.M. , Waifalkar , P.P. , Patil , P.B. , Vhatkar , R.S. , Takale , M.V. , Gaikwad , P.K. , Kamat , R.K. : TiO2 based nanostructured memristor for RRAM and neuromorphic applications: a simulation approach . Nano Converg . 3 ( 1 ), 1 - 7 ( 2016 ) 5. Levy , Y. , Bruck , J. , Cassuto , Y. , Friedman , E.G. , Kolodny , A. , Yaakobi , E. , Kvatinsky , S. : Logic operations in memory using a memristive Akers array . Microelectron. J . 45 ( 11 ), 1429 - 1437 ( 2014 ) 6. Dongale , T.D.: An elementary note on skin hydration measurement using memristive effect . Int. J. Health Inform . 2 ( 1 ), 15 - 20 ( 2013 ) 7. Nickel , J.H. , Strachan , J.P. , Pickett , M.D. , Schamp , C.T. , Yang , J.J. , Graham , J.A. , Williams , R.S.: Memristor structures for high scalability: Non-linear and symmetric devices utilizing fabrication friendly materials and processes . Microelectron. Eng . 103 , 66 - 69 ( 2013 ) 8. Emara , A. , Ghoneima , M. , El-Dessouky , M.: Differential 1T2M memristor memory cell for single/multi-bit RRAM modules . IEEE Computer Science and Electronic Engineering Conference (CEEC) , pp 69 - 72 , ( 2014 ) 9. Ning , D. , Yang , J.H. , Wei , W. , Qiang , W.H. : Non-volatile threshold adaptive transistors with embedded RRAM . Chin. Phys. Lett . 31 ( 10 ), 108504 - 4 ( 2014 ) 10. Dongale , T.D., Shinde , S.S. , Kamat , R.K. , Rajpure , K.Y.: Nanostructured TiO2 thin film memristor device using hydrothermal process . J. Alloy Compd . 593 , 267 - 270 ( 2014 ) 11. Hoessbacher , C. , Fedoryshyn , Y. , Emboras , A. , Melikyan , A. , Kohl , M. , Hillerkuss , D. , Hafner , C. , Leuthold , J.: The plasmonic memristor: a latching optical switch . Optica 1 ( 4 ), 198 - 202 ( 2014 ) 12. Murali , S. , Rajachidambaram , J.S. , Han, S.Y. , Chang , C.H. , Herman , G.S. , Conley , J.F. : Resistive switching in zinc-tin-oxide. Solid-State Electron . 79 , 248 - 252 ( 2013 ) 13. Dongale , T.D., Patil , K.P. , Vanjare , S.R. , Chavan , A.R. , Gaikwad , P.K. , Kamat , R.K. : Modelling of nanostructured memristor device characteristics using artificial neural network (ANN) . J. Comput. Sci . 11 , 82 - 90 ( 2015 ) 14. Dongale , T.D., Patil , P.J. , Patil , K.P. , Mullani , S.B. , More , K.V. , Delekar , S.D. , Gaikwad , P.K. , Kamat , R.K. : Piecewise linear and nonlinear window functions for modelling of nanostructured memristor device . J. Nano Electron. Phys . 7 ( 3 ), 3012 - 1 ( 2015 ) 15. Dongale , T.D., Mohite , S.V. , Bagade , A.A. , Gaikwad , P.K. , Patil , P.S. , Kamat , R.K. , Rajpure , K.Y.: Development of Ag/WO3/ITO thin film memristor using spray pyrolysis method . Electron. Mater. Lett . 11 ( 6 ), 944 - 948 ( 2015 ) 16. Dongale , T.D., Khot , K.V. , Mali , S.S. , Patil , P.S. , Gaikwad , P.K. , Kamat , R.K. , Bhosale , P.N. : Development of Ag/ZnO/FTO thin film memristor using aqueous chemical route . Mater. Sci Semicond. Process . 40 , 523 - 526 ( 2015 ) 17. Dongale , T.D., Patil , K.P. , Mullani , S.B. , More , K.V. , Delekar , S.D. , Patil , P.S. , Gaikwad , P.K. , Kamat , R.K. : Investigation of process parameter variation in the memristor-based resistive random access memory (RRAM): effect of device size variations . Mater. Sci. Semicond . Process. 35 , 174 - 180 ( 2015 ) 18. Dongale , T.D., Patil , K.P. , Gaikwad , P.K. , Kamat , R.K. : Investigating conduction mechanism and frequency dependency of nanostructured memristor device . Mater. Sci. Semicond . Process. 38 , 228 - 233 ( 2015 ) 19. Shinde , S.S. , Dongle , T.D.: Modelling of nanostructured TiO2- based memristors . J. Semicond . 36 ( 3 ), 034001 - 034003 ( 2015 ) 20. Yang , J.J. , Pickett , M.D. , Li , X. , Ohlberg , D.A.A. , Stewart , D.R. , Williams , R.S.: Memristive switching mechanism for metal/oxide/metal nanodevices . Nat. Nanotechnol . 3 ( 7 ), 429 - 433 ( 2008 ) 21. Strukov , D.B. , Borghetti , J.L. , Williams , R.S.: Coupled ionic and electronic transport model of thin-film semiconductor memristive behavior . Small 5 ( 9 ), 1058 - 1063 ( 2009 ) 22. Strukov , D.B. , Williams , R.S.: Exponential ionic drift: fast switching and low volatility of thin-film memristors . Appl. Phys. A Mater. Sci. Process . 94 ( 3 ), 515 - 519 ( 2009 ) 23. Messerschmitt , F. , Kubicek , M. , Schweiger , S. , Rupp , J.L. : Memristor kinetics and diffusion characteristics for mixed anionic-electronic SrTiO3-d bits: the memristor-based Cottrell analysis connecting material to device performance . Adv. Func. Mater . 24 ( 47 ), 7448 - 7460 ( 2014 ) 24. Wang , G. , Long , S. , Yu , Z. , Zhang, M. , Li , Y. , Xu , D. , Lv , H. , Liu , Q. , Yan , X. , Wang , M. , Xu , X. : Impact of program/erase operation on the performances of oxide-based resistive switching memory . Nanoscale Res. Lett . 10 ( 1 ), 39 - 46 ( 2015 ) 25. Kubicek , M. , Schmitt , R. , Messerschmitt , F. , Rupp , J.L.M.: Uncovering two competing switching mechanisms for epitaxial and ultrathin strontium titanate-based resistive switching bits . ACS Nano 9 ( 11 ), 10737 - 10748 ( 2015 ) 26. Chen , B. , Lu , Y. , Gao , B. , Fu , Y. , Zhang , F. , Huang , P. , Chen , Y. , Liu , L. , Liu , X. , Kang , J. , Wang , Y. : Physical mechanisms of endurance degradation in TMO-RRAM . In: Proceeding of International Electron Devices Meeting (IEDM) , pp. 12 - 15 , ( 2011 ) 27. Mathew , G. , Li , J. , Shafik , R.A. , Pradhan , D.K. , Ottavi , M. , Pontarelli , S. : Lifetime reliability analysis of complementary resistive switches under threshold and doping interface speed variations . IEEE Trans. Nanotechnol . 14 ( 1 ), 130 - 139 ( 2015 ) 28. Nili , H. , Walia , S. , Balendhran , S. , Strukov , D.B. , Bhaskaran , M. , Sriram , S. : Nanoscale resistive switching in amorphous perovskite oxide (a-SrTiO3) memristors . Adv. Func. Mater . 24 ( 43 ), 6741 - 6750 ( 2014 ) 29. Lee , J. , Du , C. , Sun , K. , Kioupakis , E. , Lu , W. : Tuning ionic transport in memristive devices by graphene with engineered nanopores . ACS Nano 10 ( 3 ), 3571 - 3579 ( 2016 ) 30. Wu , J. , McCreery , R.L. : Solid-state electrochemistry in molecule/ TiO2 molecular heterojunctions as the basis of the TiO2 ''Memristor'' . J. Electrochem. Soc . 156 ( 1 ), P29 - P37 ( 2009 ) 31. Strachan , J.P. , Strukov , D.B. , Borghetti , J. , Yang , J.J. , MedeirosRibeiro, G., Williams , R.S.: The switching location of a bipolar memristor: chemical, thermal and structural mapping . Nanotechnology 22 ( 25 ), 254015 ( 2011 ) 32. Tang , M.H. , Wang , Z.P. , Li , J.C. , Zeng , Z.Q. , Xu , X.L. , Wang , G.Y. , Zhang , L.B. , Xiao , Y.G. , Yang , S.B. , Jiang , B. , He , J. : Bipolar and unipolar resistive switching behaviors of sol-gelderived SrTiO3 thin films with different compliance currents . Semicond. Sci. Technol . 26 ( 7 ), 075019 ( 2011 ) 33. Gale , E.: TiO2-based memristors and ReRAM: materials, mechanisms and models (a review) . Semicond. Sci. Technol . 29 ( 10 ), 104004 ( 2014 ) 34. Chang , K.C. , Chang , T.C. , Tsai , T.M. , Zhang , R., Hung , Y.C. , Syu , Y.E. , Chang , Y.F. , Chen , M.C. , Chu , T.J. , Chen , H.L. , Pan , C.H. : Physical and chemical mechanisms in oxide-based resistance random access memory . Nanoscale Res. Lett . 10 ( 1 ), 1 - 27 ( 2015 ) 35. Choi , S. , Yang , Y. , Lu , W. : Random telegraph noise and resistance switching analysis of oxide based resistive memory . Nanoscale 6 ( 1 ), 400 - 404 ( 2014 ) 36. Balatti , S. , Ambrogio , S. , Cubeta , A. , Calderoni , A. , Ramaswamy , N. , Ielmini , D. : Voltage-dependent random telegraph noise (RTN) in HfOx resistive RAM . In: IEEE International Reliability Physics Symposium, MY-4 ( 2014 )


This is a preview of a remote PDF: https://link.springer.com/content/pdf/10.1007%2Fs40089-017-0217-z.pdf

T. D. Dongale, K. V. Khot, S. V. Mohite, N. D. Desai, S. S. Shinde, V. L. Patil, S. A. Vanalkar, A. V. Moholkar, K. Y. Rajpure, P. N. Bhosale, P. S. Patil, P. K. Gaikwad, R. K. Kamat. Effect of write voltage and frequency on the reliability aspects of memristor-based RRAM, International Nano Letters, 2017, 209-216, DOI: 10.1007/s40089-017-0217-z