Optimization of ALD High-K Dielectrics via C-V Analysis

2014 Annual Conference on Microelectronic Engineering, May 2014 William Abisalih Optimization of ALD High-K Dielectrics via C-V Analysis William Abisalih Abstract— As device scaling is an ever present concern in semiconductor manufacturing, the need for thin, conformal films with which to fabricate these devices is paramount. One technology that appears prominently placed to fill this need is Atomic Layer Deposition. This work presents a study on atomic layer deposited alumina (Al203), hafnia (HfO2), and silicon dioxide (Si02) as dielectric materials characterized using capacitance-voltage (CV) analysis. MOS capacitors were fabricated utilizing various combinations of alumina or hafnia and silicon dioxide as an interfacial layer. Each dielectric film was characterized optically to determine the thickness, and then CV analysis was performed on each device. The results showed that the dielectric and interface quality of Al203 on bare silicon was superior to Hf02 on bare silicon. However the performance of Al203 devices dropped with the addition of interfacial Si02, while the performance of the Hf02 devices was greatly enhanced. The treatment that had HfO2 with a monolayer of interfacial Si02 on silicon produced the best results. I. NTRODUCTION j\TOMIC Layer Deposition (ALD) is a thin film deposition method that employs alternate saturative surface reactions to lay down an extremely thin film layer with great precision and uniformity. Developed and introduced as Atomic Layer Epitaxy (ALE) in 1970’s in Finland [1], it was originally designed to be used to make thin film electroluminescent flat panel displays. Having successfully fulfilled its purpose in this task due to its high dielectric strength and uniformity, it was soon applied to epitaxial compound semiconductors, but with mixed success; although there has been moderately extensive research performed in the field, it has yet to find its way into commercial applications. That said, one of the ever present concerns in the semiconductor industry is device scaling, and as the limitations of current process technology start to catch up with the advances, interest in ALD as the next process enhancement is growing. ALD itself is a conceptually a straightforward process that can, at its simplest, be broken down Manuscript received May 11,2014; revised May 11,2014. W. Abisalih is with the Electrical and Microelectronic Engineering Department at the Rochester Institute of Technology, Rochester, NY. into four steps: 1) exposure of the first precursor, 2) purge of the reaction chamber, 3) exposure of the second precursor, and 4) purge of the reaction chamber. This process is then repeated until the desired film thickness has been achieved. The first precursor exposure serves to lay down the primary film that will be exactly one monomolecular layer thick, as only the atoms in contact with the substrate will bond firmly, while the other precursor molecules will be removed by the following purge. Each subsequent exposure reacts with the previous layer, liberating the necessary ligands to produce the desired solid. After that another purge clears all excess molecules away and readies the surface for the next precursor exposure. An example of this process is shown schematically in Fig. 1. Precursor~P ~ a°~°~;~ ~ 1~L Cycle Reactant Byproduct c~ C7° 0 ê00000 00 ~.,ooo ec 0 0° Fig. 1: One cycle of an atomic layer deposition. [2] Although the process can get significantly more complex depending on the chemistry involved, the advantages of using an ALD system remain relatively constant. The primary advantage obtained from using ALD over other systems is the level of control it provides regarding film thickness. Because the film growth is self-limiting, each deposition will produce exactly the same film thickness. This results in a perfectly linear growth that is dependent solely on the number of deposition William Abisalih 2014 Armual Conference on Microelectronic Engineering, May 2014 cycles performed. It should be noted that while the growth rate will always be linear, the rate is determined by the surface density of reactive sites that is produced from the first cycle when the surface is converted from substrate to film. The other main advantage to a self-limiting process is uniformity. Because there will be a certain number of reactive sites available, once those sites have been filled no more reactions will take place and any excess material will be purged away. That also means that the film growth is not dependent on the amount of precursor exposed; as long as there is enough precursor to saturate all reactive sites the growth will be uniform. Despite this impressive list of advantages, it is important to note some of the major limitations of ALD as well; primarily time. Because ALD is an iterative process that frequently requires many process cycles, and because the growth rate can be controlled but only to an extent, it can take a prohibitive amount of time to build up the desired film thickness. That said, as devices continue to scale smaller and smaller this becomes less of an issue. As the desired film thickness goes down, so does the time required to grow that thickness, which makes ALD a more and more viable option. The other main limitation is simply a lack of process refinement for a variety of materials. Because semiconductor manufacturing has evolved to include more than silicon, before any manufacturer would attempt to run an ALD process it must be determined how the fabrication of materials such as compounds or irregular metal layers respond to the ALD process. interfacial Si02 layer on silicon, and Hf02 with an interfacial monolayer of Si02 on silicon. These five process splits were designed so that the basic single film recipes could provide a comparison between A1203 and Hf02 characteristics, while the high-K dielectrics on top of Si02 would theoretically demonstrate the benefits of an interfacial layer and how each high-K film responded, and the monolayer Si02 film would allow for an examination of the effects of dielectric stack thickness. All of the dielectric ALD was performed on the University of Rochester Nanolab’s Cambridge Savannah 200, with a target thickness for each individual film, except the monolayer, of 1 ooA. Before processing continued the dielectric films underwent an optical characterization where they were subjected to a Variable Angle Spectroscopic Ellipsometer (VASE) thickness measurement, which relies on the optical properties of a film to repolarize an incident light ray. By tracking the phase and intensity change between the incident and reflected light ray, these measures can be compared to theoretical models for various film combinations and iteratively optimized to determine the most likely film thicknesses. Fig. 2 shows an example of the phase angle measurements; delta and phi are two variables that are compared to the theoretical models to determine film thicknes (...truncated)