Mathematical Modeling and Fault Tolerance Control for a Three-Phase Soft-Switching Mode Rectifier

Hindawi Publishing Corporation Mathematical Problems in Engineering Volume 2013, Article ID 598130, 13 pages http://dx.doi.org/10.1155/2013/598130 Research Article Mathematical Modeling and Fault Tolerance Control for a Three-Phase Soft-Switching Mode Rectifier Kuei-Hsiang Chao and Chin-Tsang Hsieh Department of Electrical Engineering, National Chin-Yi University of Technology, No. 57, Section 2, Zhongshan Road, Taiping District, Taichung 41170, Taiwan Correspondence should be addressed to Kuei-Hsiang Chao; Received 10 October 2012; Revised 13 December 2012; Accepted 14 December 2012 Academic Editor: Zheng-Guang Wu Copyright © 2013 K.-H. Chao and C.-T. Hsieh. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. This study primarily focuses on the design of an intelligent three-phase soft-switching mode rectifier (SSMR). Firstly, the smallsignal dynamic model of a single-phase SSMR is derived together with the design of its controller. Then, the developed single-phase SSMR is connected to form an intelligent three-phase SSMR. When any of the phase modules in the proposed intelligent threephase SSMR experiences a fault, it can continue to supply power automatically under reduced load capacity while still maintaining good power quality characteristics. Finally, some simulation results were used to demonstrate the effectiveness of the proposed intelligent three-phase SSMR design. 1. Introduction Traditional rectifiers contain a large amount of harmonic currents, which reduce the power factor of input AC side and greatly deteriorate the power quality. To enhance power quality, a switching-mode rectifier (SMR) with power factor regulation [1] is used to make the rectifier-induced current form a sine wave with the power factor near to 1. A traditional hardswitch mode SMR comes with reduced power conversion efficiency due to a larger switching loss and possesses greater switching stress and electromagnetic interference (EMI). It uses the auxiliary resonant branches connected to the original power circuit on the hard-switching mode SMR and the modified switching control signals of the pulse-width modulation (PWM) to complete the soft-switching mode rectifier (SSMR) operation [2]. In general, large electrical equipments are fed with a three-phase power. A considerable variety of threephase circuit configurations have been derived from singlephase switching rectifier circuits. Among them, the circuit architecture of a boost converter [3–5] is the simplest in form, easiest to control, and superior in performance; these are the primary reasons for its wide use. To date, a variety of circuit configurations and control technologies for the single-stage three-phase boost AC/DC converter have been proposed. Some of these configurations use a single active switch [6, 7], while others use six active switches [8, 9]. Single active switch-based three-phase boost AC/DC converters have a very simple architecture but contain a large amount of low older harmonics. Six active switch-based three-phase boost AC/DC converters can obtain a better power factor and harmonic control characteristics but involve a more complex control strategy. Some three-phase SMRs constructed using three or two separate single-phase SMR modules were presented in [10– 13]. Though the three connected single-phase modules in a three-phase Δ-connected SMR [12] can directly apply the power factor control and soft-switching technology of a single-phase module, when one of the three-phase modules fails, Δ-connected can change to 𝑉-connected. It can continue to provide power under a reduced load condition, which translates into improved system reliability, but it is done at the expense of power quality [12]. In [13], the authors proposed a modified T-connected three-phase SMR, which is constructed using two single-phase SMRs and one center-tapped autotransformer. The three-phase line drawn currents are made balanced by applying unbalanced twophase voltages to power the two-single SMRs. However, as any module is randomly disabled, this three-phase SMR 2 Mathematical Problems in Engineering 𝑖𝐷 + 𝑣𝐷 − 𝑖𝐷𝐿 𝑖𝑜 𝑖𝐿𝑚 + 𝐿𝑚 𝑖ac 𝑖𝐿𝑟 𝑖𝑆 + 𝑣ac 𝑣𝑑 𝐷𝑆 𝐶𝑟 + 𝑣𝐶𝑟 𝑆 − + 𝐷 𝑖𝐷𝑎 𝐷𝑎 𝐶𝑜 𝑖𝑆𝑎 𝑆𝑎 − 𝐿𝑟 𝐷𝑆𝑎 + 𝑣𝑆𝑎 − + 𝑅𝐿 𝑣𝐶𝑜 − 𝑣𝑜 − − Figure 1: Circuit configuration of the proposed ZVT SSMR. 𝑣𝑜∗ Σ + − 𝜀𝑣 Voltage controller 𝐺𝑐𝑣 ̂𝑖𝐿𝑚 × ∗ 𝑖𝐿𝑚 Σ + − 𝜀𝑖 Current controller 𝐺𝑐𝑖 𝑣tri 𝑖′𝐿𝑚 𝑣′𝑜 𝑣cont PWM scheme drive circuit 𝑆 𝑣𝑜 𝑆𝑎 𝑖𝐿𝑚 𝐾 𝐾𝑖 𝑣𝑑 = ∣𝑣𝑎𝑐 ∣ 𝐾𝑣 Figure 2: Block diagram of the control structure of the proposed ZVT SSMR. cannot online detect the fault occurrence and continuously perform the three-phase SMR operation through automatic switch connection arrangement. To overcome these problems, this study proposes that single-phase SSMR modules should be connected together to form an intelligent threephase SSMR that not only has a simple connection structure but also possesses automatic online fault detection functions. In the case of a module experiencing a fault, the intelligent three-phase SSMR can continue to maintain the three-phase balance of high power quality electricity supply without having to shut down for fault module maintenance, thus greatly enhancing the quality and reliability of the power supplied by the system. 2. Single-Phase SSMR Figure 1 shows the power circuit of the single-phase boost SSMR adopted in this study. The proposed zero-voltage transition (ZVT) SSMR system design adopts the current switch control method that uses ramp-comparison pulsewidth modulation under the continuous current conduction mode (CCM). 2.1. Scheme of Control Loop. The control block diagram of the proposed SSMR, as shown in Figure 2, contains both inner and outer control loops. The inner loop is the current control loop, and the outer loop is the voltage control loop. The role of the current control loop is to raise the power factor, and the role of the voltage control loop is to provide stability control for the output DC voltage. According to the on- and off-states of circuit switches and diodes in Figure 1, a switching period can be divided into seven operating modes. Their main waveform variables are as shown in Figure 3. 2.2. Design of a Current Control Loop Controller. The state average method can be used to derive the current loop gain transfer function [10]. If the current controller 𝐺𝑐𝑖 (𝑠) chooses to use a proportional-integrated (PI) controller, then the general rule of the crossover frequency of current control loop gain should be less than the switching frequency 1/2 (i.e., 𝑓𝑐 < 0.5𝑓𝑠 ) and should be applied for the design of the current controller [10], which obtains 𝐺𝑐𝑖 (𝑠) = 𝐾𝑃𝑖 𝑠 + 𝐾𝐼𝑖 16.5𝑠 + 10000 = . 𝑠 𝑠 (1) 2.3. Deriving the Converter Model. The ZVT SSMR circuit configuration in Figure 1 was divided into a slow-variable subsystem a (...truncated)