Annihilating Pores in the Desired Layer of a Porous Silicon Bilayer with Different Porosities for Layer Transfer

www.nature.com/scientificreports OPEN Received: 10 December 2018 Accepted: 20 August 2019 Published: xx xx xxxx Annihilating Pores in the Desired Layer of a Porous Silicon Bilayer with Different Porosities for Layer Transfer C.-C. Chiang & Benjamin T.-H. Lee A silicon layer that is tens of micrometers thick on a handle substrate is desired for applications involving power devices, microelectromechanical systems (MEMS), highly efficient silicon solar cells (<50 µm), etc. In general, if the initial silicon layer obtained from the layer transfer process using the etch-stop or ion-cut techniques, which may provide very accurate thickness control, is too thin, then additional epitaxial growth is required to increase the thickness of the silicon layer. However, epitaxial growth under strict predeposition conditions is a time-consuming and expensive process. On the other hand, producing porous silicon via anodization in a hydrofluoric acid solution offers an efficient way to control the dimensions of the generated pores directly on the nano- or macroscale via the current density. When sintering the porous layer via high-temperature argon annealing, the porosity of the porous layer determines whether this porous layer can serve as a device layer or a separation layer. In addition, it is clearly easier to create a transferred layer ten of micrometers thick via anodization than by ion implantation and/or epitaxial deposition. The layer transfer technique, based on a defined cutting position and wafer-bonding technology1,2, can transfer a layer from a crystalline substrate onto a desired substrate. This technique has great flexibility in terms of a sub-microscale thickness—0.5 μm, for example—but maintains the crystalline quality and properties of the original substrate, which has proven helpful in the development of some innovative applications such as hybrid integration of IC and MEMS3, high-efficiency solar cells4,5, and device layer transfer6–8. One of the best examples of the application of the layer transfer technique is in the fabrication of SOI (silicon on insulator) materials. The available manufacturing methods are considerably different1,2,9–11 for making different SOI thicknesses for various applications. For example, to fabricate ultrathin SOI materials (silicon thickness <0.1 μm), ion-cut technology is a quite mature and appropriate technology. For the fabrication of thick SOI materials (10 μm <SOI silicon thickness <100 μm), fine grinding and polishing is most frequently used. When the SOI silicon thickness is between 1 μm and 10 μm, the manufacturing is more difficult than for other thicknesses. Typically, the procedure combines ion-cut processing with an epitaxial growth technology for fabrication because such a thickness range is outside the regular scope of polishing-thinning or hydrogen ion-cutting. However, the cost of this type of thick SOI manufacturing may be increased greatly if the layer transfer process involves ion implantation and epitaxial growth. The reason for developing a layer-transfer process for thin-film solar cells is that a thinner wafer thickness of the silicon solar cells corresponds to a greater reduction in the consumption of the silicon substrate and a greater increase in cell efficiencies12. These benefits have prompted many renewable energy research teams to study kerfless techniques13,14 for producing silicon layers with thicknesses of tens of micrometers (<50 μm) with layer-transfer processing. When manufacturing solar cells, the two processes of ion-cut and epitaxial growth are ideally used as little as possible. Here, we demonstrate a layer-transfer method using only an electrochemical process to produce a porous silicon bilayer or multilayer as both the device layer and the separation layer while omitting the ion implantation and epitaxial growth steps. Since 1995, the ELTRAN process developed by Sato et al.15 has utilized a porous silicon layer as a separation layer to detach a predeposited silicon layer to transfer this layer onto a desired substrate for many applications16–18. Department of Mechanical Engineering, National Central University, Taoyuan City, Taiwan. Correspondence and requests for materials should be addressed to B.T.-H.L. (email: ) Scientific Reports | (2019) 9:12631 | https://doi.org/10.1038/s41598-019-49119-8 1 www.nature.com/scientificreports www.nature.com/scientificreports/ When applying this process to the manufacture of thin-film solar cells, the silicon layer needs to grow into a layer tens of micrometers thick via the silicon epitaxial growth technique. Based on the concept of interaction between the porous silicon separation layer and silicon epitaxial growth, various extensive methods have been developed to grow the top device layer on the separation layer, such as SONY’s sintered porous silicon (SPS) method19, kerfless layer transfer13, and quasi-monocrystalline porous silicon (QMPS)20,21. In addition, IMAC uses thermal stresses to delaminate the thick silicon layer from a silicon ingot predeposited by a thick metal layer with a large difference in the thermal expansion coefficient (e.g., silver)22,23. A multilayer porous silicon structure incorporating recrystallization techniques is used in an alternative manufacturing method. There are several approaches to fabricating a multilayer porous silicon structure24, such as performing anodization with alternating doping concentration layers, anodization with alternating operation temperatures, or anodization with alternating applied current densities. Because the dissolution of silicon preferentially occurs at the pore tips, where the field is concentrated25,26, the porosity of the layer formed previously is almost unchanged during subsequent etching. To create such multilayer structures, a variable current density is applied. This layer transfer method prepares a transferable silicon layer in three main steps. First, it produces a low- to high-porosity porous silicon bilayer by applying variable current densities to change the porosity during anodization processing. We define the thickness of the device layer via time control. The optimum thickness of the top porous silicon layer used in this technique is in the range of 1 to 50 μm. Second, it applies a high-temperature argon annealing technique27,28 to close the pores in the top porous silicon layer, thereby converting it into a defect-free crystalline layer. Finally, it transfers the fused top silicon layer of the device onto the desired substrate using the wafer-bonding technique. The principle of using varying currents to create different-porosity layers is based on the Lehmann-Gösele model26,29. They suggested that in an acidic electrolyte containing fluoride ions, the application of an anodic potential can cause an electrochemical dissolution reaction (i.e., one involving SiF62−) on the surface of the silicon substrate. The surface of the silicon substrate then forms porous silicon and (...truncated)